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_aTK7888.3 _b.V344 2011 |
100 | 1 |
_aVahid, Frank _93749 |
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245 | 1 | 0 |
_aDigital design with RTL design, VHDL and verilog _cFrank Vahid |
260 |
_aHoboken,N.J John Wiley &Sons _cc2011 |
||
260 |
_aHoboken,N.J John Wiley &Sons _cc2011 |
||
300 |
_axvi, 575p. _bill. _c24 cm |
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650 | 0 |
_aComputer architecture. _91506 |
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650 | 0 |
_aElectronic digital computers _xDesign and construction _93750 |
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650 | 0 |
_aRTL (Computer program language) _93751 |
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650 | 0 |
_aVerilog (Computer hardware description language) _93680 |
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650 | 0 |
_aVHDL (Computer hardware description language) _93752 |
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_c1659 _d1659 |